Current pulses, source impedance, and LTSpice

In my last post, I discussed the measurement of source impedance. The conclusion was that source impedance is indeed non-negligible for project Shockpad. This time, I'll discuss what to do about it.

First, I'll remind you what we're up against and what we hope to accomplish:

The battery: I hope to use a CR2032 coin cell to power the Shockpad. The source impedance for this battery begins at ~10 ohms and climbs to 100 ohms (or even 1k ohm) as it is depleted.

The circuit: My circuit draws short pulses of current. For 500us, the current draw spikes up to ~24mA.

Powering my circuit with a CR2032 is problematic for two reasons.

The First Problem: First and foremost, this design runs a high risk of brownout. Consider the image below to be our "before" graph. We'll discuss the particulars later, but it should be easy to convince you that dropping from 3V down to 1.4V or 0.5V could cause performance issues.

The Second Problem: Suppose that the circuit does NOT brown out (we haven't yet discussed it's max/min voltage requirements). Energizer says that repeatedly subjecting the CR2032 to large pulse currents, even if the duration is brief, will reduce the cell's total life. In the Energizer graph below, a fairly representative pulse current has reduced the cell's life to 175mAh (that's a 22% loss from the 225mA nominal capacity).

So, we have two goals which initially appear to be in conflict. To solve the first problem, we actually want to supply MORE energy to the circuit so that the voltage does not drop. To solve the second problem, we want to draw LESS energy from the battery at exactly the same moment. Fortunately, our electronics toolbox contains capacitors. Capacitors store energy, and they deliver it much more rapidly than a battery. If we can add an appropriately sized capacitor to the circuit, we can shelter the battery from large pulses without starving the circuit for voltage. I'm sure I could go to my toolbox, pull out a 4700uF monster, and call it a day.

But, that would hardly be efficient in terms of cost, size, or weight. In general, a capacitor's cost and physical size scale with its value. (Note: voltage rating has a big impact on size/cost too, but that can be held constant in this example) So, we want to determine the minimum capacitance value which will solve our two problems. 4700uF may be laughably large, but can we possibly get by with that tiny 0805 ceramic sitting on top of the coin cell? I'll show how LTspice can be used to answer these questions.

SPICE is the general term for electronic circuit simulation software. LTspice, from Linear Technology is widely used by professionals and hobbyists alike. Linear Tech has a vested interest in providing good simulation tools to their customers since their product line is heavily slanted toward analog components such as regulators and op-amps. In my opinion, the tool's popularity is due the straightforward user interface and price (free).

The circuit for this simulation should look familiar. It is virtually identical to source impedance measurement circuit which I presented last time.

After running the simulation, we'll be probing two points. To see if we've addressed brownout, we'll probe the voltage at the top of R1. To see if we've adequately reduced the current delivered by the battery, we'll probe the current through Rsource. As a baseline, I started with a very small value for C1. 4.7uF produces the voltage graph shown earlier in this post, and this current graph:

4.7uF Current Waveform

So, with C1 = 4.7uF, we have large current spikes and a big voltage dip. As we test out larger capacitors, we need a definition of success. My circuit contains a radio module. The datasheet for that component lists a minimum operating voltage of 2.0V. Good vs. bad current is not as clear. Energizer uses 23mA and 6.8mA as examples of "bad" pulses which reduce battery life. Meanwhile, CR2032's are normally tested at 190uA (or 15k ohms) of continuous loading. So, somewhere between 190uA and 6.8mA, we transition from acceptable to unacceptable. When in doubt, engineers often resort to a factor of 10. So, we could say that the cutoff is 190uA * 10 = 1.9mA. Or, we could say that the cutoff is 6.8mA / 10 = 680uA. For now, we'll be agressive and aim for 680uA. If this becomes problematic, there's some margin/wiggle room up to 1.9mA.

The solution method presented here is essentially guess-and-check. If 4.7uF was too small, let's increase by a factor of 10 to C1 = 47uF. This produces the following graphs:

47uF Voltage Waveforms

47uF Current Waveforms

The voltage graph shows good news. C1 = 47uF has significantly improved the voltage situation. The lowest voltage observed is 2.5V, well above our 2.0V requirement. But, current draw is a different story. We DID make some improvement; recall that the peak was at 24mA for C1 = 4.7uF. But, a coin cell spends much of its useful life around 10 ohms of source impedance, and we still have a peak current draw of 16mA when Rsource = 10 ohms. So, we need to try a larger capacitor, but we really only need to look at the current waveform to gauge its effectiveness. Another 10x step, to C1 = 470uF, produces the following graph:

470uF Curent Waveforms

This is much better than before, but we have not reached our original goal. Another 10x step would put us back at that so-big-it's-silly 4700uF capacitor that I discussed at the beginning. To be academically thorough, I did run the simulation, and I can report that it does bring the peak draw down, below our original goal of 680uA, to a pleasant 470uA. But, a 4700uF capacitor is simply not practical. At this point, I'm going to depart from the simulation and talk about other constraining factors before arriving at a best-effort component selection

So, let's talk compromises. Though it would be great if we could bring the peak current down below 680uA, there are other capacitor constraints. It needs to be a surface-mount component, not a through-hole part. Also, the capacitor should probably not be taller than the coin cell battery (3.20mm max height). My original photo contained an 0805 ceramic capacitor. I ran a Digikey search for 0805 ceramic capacitors rated for 6.3V, and the largest value was 47uF - not even close to our needs. Moving up to a 1210 package, 100uF is available - but this is still woefully inadequate. Having exhausted my options with ceramic capacitors, it was time to pick a new chemistry. Aluminum electrolytic capcacitors are known for providing large capacitance values at a low price. Unfortunately, they are not known for being low-profile. A quick parametric search, limiting height to 3.95mm (slightly taller than a CR2032) showed a 100uF 6.3V part as the largest available. Also known for their bulk, at a slightly higher price point, are Tantalum capacitors. If you look inside a modern cell phone (another product that draws large bursts of current), you're likely to see many yellow 2-terminal components; those are tantalum capacitors. Applying the same height/voltage constraints to my search, I found values all the way up to 2200uF! But, this part also shows us one reason why tantalums are not used everywhere and all the time - it costs several dollars even in quantity. I'm choosing to filter out all parts whose low-quantity price is above $2; I assume this will translate to an actual negotiated volume price <$1. Applying the price filter, the height filter, and the 6.3V filter, I'm left with 470uF as the largest tantalum capacitance available. There seems to be a few choices in this size, Kemet, AVX, and Vishay all have competing product lines. Here's a representative part from Kemet.

Because we settled out on 470uF, the predicted current can be found in the image above. We did not reach the aggressive goal of 680uA, but we are well below Energizer's two textbook examples of peak current (6.8mA and 23mA). Recall that our baseline simulation (4.7uF) showed a sustained peak current of 24mA. By adding a 470uF capacitor, the peak current is truly that (a peak) rather than an extended duration at the maximum value. And, magnitude of the peak has been reduced by a factor of 10 - an engineer's favorite number.

So, where have we been and what have we learned? The current consumption profile for my device is near the upper end of what the CR2032 can support. Without careful design, my system's actual run-time would fall noticeably short of nominal predictions. But, simulation shows that adding a bulk capacitor can bring the circuit's needs and the battery's capabilities into much closer alignment. On the other hand, practical constraints of size, cost, and weight mean that we can only afford to reduce, not eliminate, pulsed current draw as seen by the battery. This issue should be re-visited when prototype hardware is available. Actual circuit performance and battery life should be tested as a part of the hardware verification and validation activities.

OR

Depending on the project's risk tolerance, this level of uncertainty may be unacceptable. The CR2032 looks like it could work, with careful design. An alternate approach would be to abandon the CR2032 battery entirely and choose a different cell which will easily supply this circuit's needs (for example, two alkalaine AAA's). What is more important? Do we optimize size/weight now and accept long-term risk related to runtime? Or, do we increase the size/weight right now in exchange for an assurance of easily meeting the runtime goals? Which parameter is more important to the end user? In the future, perhaps I'll present a weighted/ranked list of user needs to inform this decision.

You can download your own copy of LTspice here.
You can download my simulation schematic here.
For another view on this topic, check out White Paper SWRA349 from Texas Instruments.